Courses

PCB DFM and Manufacturing Hand-off

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Prepare PCB designs for successful manufacturing hand-off. Covers DFM rules, IPC-2221 standards, Gerber/ODB++ output generation, panelisation, solder mask and silkscreen design, assembly drawing creation, and communication with PCB fabrication houses to reduce re-spins and accelerate NPI.

RTOS Fundamentals FreeRTOS Zephyr

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Master Real-Time Operating Systems for embedded product development. Covers preemption, priority inversion, deadlock, FreeRTOS task/queue/semaphore/mutex APIs, Zephyr RTOS kernel, device tree, and inter-task communication. Projects build multi-threaded firmware on STM32 and Nordic nRF platforms.

Embedded C and Bare-Metal Programming

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Learn embedded C programming for bare-metal microcontroller development. Covers startup code, linker scripts, GPIO/interrupt/timer programming, memory-mapped I/O, bitfield manipulation, and peripheral driver development on ARM Cortex-M (STM32) and RISC-V platforms.

ML Fundamentals for Hardware Engineers

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Bridge the gap between machine learning and hardware engineering. Covers ML fundamentals (linear models, neural networks, CNNs, transformers), training vs inference, quantisation, pruning, and how ML workloads map to hardware. Designed for VLSI, FPGA, and embedded engineers who need AI/ML literacy f

FPGA Fundamentals and Architecture

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Start your FPGA journey with a comprehensive look at FPGA architecture and fundamentals. Covers CLBs, LUTs, flip-flops, BRAM, DSP blocks, clock resources, and IO banks for Xilinx UltraScale+ and Intel Agilex FPGAs. Ideal for ECE graduates and software engineers transitioning into FPGA roles.

Post Silicon Validation Fundamentals

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Introduction to post-silicon validation for new chip bring-up and characterisation. Covers validation planning, lab setup, DUT bring-up sequence, basic measurements, debug tool selection, and validation-to-spec methodology. Designed for graduates and firmware engineers transitioning into silicon val

NVMe Training

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Learn NVMe (NVM Express) – the high-performance storage protocol over PCIe. Covers NVMe command set, submission/completion queue pairs, admin commands, NVMe namespaces, power management, and NVMe-oF with NVMe controller DV methodology.

SPI Training

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Learn the SPI protocol for embedded and SoC design. Covers SPI modes (CPOL/CPHA), master/slave architecture, full-duplex transfers, multi-slave topologies, Quad-SPI (QSPI) for NOR flash, and SPI controller RTL design with UVM SPI VIP verification.

Verilog

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Become proficient in Verilog for ASIC and FPGA design. Covers all Verilog constructs, synthesis-aware RTL coding, parameterisation, always blocks, generate statements, and testbench writing. Projects design arithmetic units, FIFOs, and state machines targeting real synthesis with Synopsys DC and Cad