Master FIFO design for synchronous and asynchronous clock domains. Covers FIFO depth estimation, pointer arithmetic, Gray code CDC FIFOs, almost-full/empty flags, burst-mode FIFOs, and synthesis-safe implementation. Includes formal verification of CDC properties and integration into AXI streaming in
Learn more| Has discount |
![]() |
||
|---|---|---|---|
| Expiry period | Lifetime | ||
| Made in | English | ||
| Last updated at | Sun Apr 2026 | ||
| Level |
|
||
| Total lectures | 0 | ||
| Total quizzes | 0 | ||
| Total duration | Hours | ||
| Total enrolment |
0 |
||
| Number of reviews | 638 | ||
| Avg rating |
|
||
| Short description | Master FIFO design for synchronous and asynchronous clock domains. Covers FIFO depth estimation, pointer arithmetic, Gray code CDC FIFOs, almost-full/empty flags, burst-mode FIFOs, and synthesis-safe implementation. Includes formal verification of CDC properties and integration into AXI streaming in | ||
| Outcomes |
|
||
| Requirements |
|