Learn advanced IC packaging technologies driving the chiplet era. Covers WLP, FOWLP, TSV, 2.5D interposer (CoWoS), 3D stacking, SiP, and thermal/mechanical design for advanced packages. Essential for engineers working on AI, HPC, and mobile SoC packaging roadmaps.
Learn more| Has discount |
 |
||
|---|---|---|---|
| Expiry period | Lifetime | ||
| Made in | English | ||
| Last updated at | Sun Apr 2026 | ||
| Level |
|
||
| Total lectures | 0 | ||
| Total quizzes | 0 | ||
| Total duration | Hours | ||
| Total enrolment |
0 |
||
| Number of reviews | 653 | ||
| Avg rating |
|
||
| Short description | Learn advanced IC packaging technologies driving the chiplet era. Covers WLP, FOWLP, TSV, 2.5D interposer (CoWoS), 3D stacking, SiP, and thermal/mechanical design for advanced packages. Essential for engineers working on AI, HPC, and mobile SoC packaging roadmaps. | ||
| Outcomes |
|
||
| Requirements |
|