Master CXL – the emerging coherent interconnect for CPU-accelerator-memory systems. Covers CXL 1.1/2.0/3.0 specifications, CXL.io, CXL.cache, CXL.mem, and CXL switch topology. Essential for AI accelerator, HPC, and data centre SoC engineers.
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| Expiry period | Lifetime | ||
| Made in | English | ||
| Last updated at | Sun Apr 2026 | ||
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| Total lectures | 0 | ||
| Total quizzes | 0 | ||
| Total duration | Hours | ||
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| Number of reviews | 267 | ||
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| Short description | Master CXL – the emerging coherent interconnect for CPU-accelerator-memory systems. Covers CXL 1.1/2.0/3.0 specifications, CXL.io, CXL.cache, CXL.mem, and CXL switch topology. Essential for AI accelerator, HPC, and data centre SoC engineers. | ||
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