Learn DDR DRAM protocol from fundamentals to controller implementation. Covers DDR4 command/address bus, timing parameters (tCL, tRCD, tRP), read/write burst flows, power states, auto-refresh, and DDR PHY interface with UVM DDR VIP verification.
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| Expiry period | Lifetime | ||
| Made in | English | ||
| Last updated at | Sun Apr 2026 | ||
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| Total lectures | 0 | ||
| Total quizzes | 0 | ||
| Total duration | Hours | ||
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| Number of reviews | 297 | ||
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| Short description | Learn DDR DRAM protocol from fundamentals to controller implementation. Covers DDR4 command/address bus, timing parameters (tCL, tRCD, tRP), read/write burst flows, power states, auto-refresh, and DDR PHY interface with UVM DDR VIP verification. | ||
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