Design PCBs for high-speed digital interfaces without signal integrity failures. Covers controlled impedance design, stackup planning, DDR4/DDR5 PCB routing rules, termination strategies, reflection and crosstalk mitigation, and SI simulation using HyperLynx/Sigrity targeting DDR5 and PCIe Gen4 host
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| Expiry period | Lifetime | ||
| Made in | English | ||
| Last updated at | Sun Apr 2026 | ||
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| Total lectures | 0 | ||
| Total quizzes | 0 | ||
| Total duration | Hours | ||
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| Number of reviews | 643 | ||
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| Short description | Design PCBs for high-speed digital interfaces without signal integrity failures. Covers controlled impedance design, stackup planning, DDR4/DDR5 PCB routing rules, termination strategies, reflection and crosstalk mitigation, and SI simulation using HyperLynx/Sigrity targeting DDR5 and PCIe Gen4 host | ||
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